BCM56780 · TSMC 7 nm · 1RU 32×400G with iPo-DWDM

Broadcom Trident 4 Trident 4 Switches 12.8 Tbps · 32 × 400G · the modern DC leaf.

Two open 1RU 32×400G platforms validated on OcNOS-DC: Edgecore AS9726-32DB and UfiSpace S9300-32D. The DC-leaf-class chip with iPo-DWDM headroom — 400G ZR/ZR+ coherent optics direct in the cage, no transponder shelf required.

01The Switches 02Inside the Silicon 03Generation Jump 04OcNOS-DC
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12.8Tbps
Switch Capacity
32×400G
Native Port Radix
1RU
Form Factor
2SKUs
OcNOS-Validated
400GZR
iPo-DWDM Ready
01
The Switches
Open hardware running Trident 4

Two 1RU sibling SKUs. One OcNOS-DC image.

Same architectural class — 32 × QSFP-DD on Broadcom BCM56780 — different ODMs. Both ship ONIE pre-loaded and run the same OcNOS-DC image. The differences are procurement framing and which vendor relationship suits your fleet. Each card links to the full vendor datasheet (PDF, hosted locally).

Edgecore· DCS series
DC leaf · 400G

AS9726-32DB

Validated on OcNOS-DC · ONIE pre-loaded
Ports
32 × QSFP-DD (400G)Breakout: 2×200 / 4×100 / 8×50 (up to 256 logical)
Form
1RU · 438.4 × 500 × 43.4 mm
Power
~1500 W typical · hot-swap redundant~47 W per QSFP-DD cage
CPU
Intel Xeon D · 2 GB RAM
▌ Pick this when

400G DC leaf with iPo-DWDM headroom — 400G ZR/ZR+ pluggable optics direct in the spine, no transponder. Edgecore-branded SKU.

Edgecore AS9726-32DB datasheet PDF
UfiSpace· S9300 series
DC leaf · 400G

S9300-32D

Validated on OcNOS-DC · ONIE pre-loaded
Ports
32 × QSFP-DD (400G)Breakout: 2×200 / 4×100 / 8×50 (up to 256 logical)
Form
1RU · 440 × 500 × 43.5 mm
Power
~1500 W typical · hot-swap redundant~47 W per QSFP-DD cage
CPU
Intel Xeon D · 2 GB RAM
▌ Pick this when

Same architectural class as AS9726-32DB. Pick by ODM relationship, BoM economics, or where UfiSpace platforms already dominate the rest of your fleet.

UfiSpace S9300-32D datasheet PDF

· How TD4 fits next to the rest of the OcNOS portfolio

vs Tomahawk 4TD4 is half the capacity in half the rack space — DC leaf class. TH4 (25.6 Tbps) is for spine/aggregation roles where deep buffer matters.
vs Tomahawk 5TD4 is 400G; TH5 (51.2 Tbps) is 800G. Pair them: TD4 leaf, TH5 spine, in larger AI fabrics.
vs Trident 3TD3 maxes at 100G ports; TD4 is the modern 400G upgrade path. Drop-in OcNOS-DC compatibility.
iPo-DWDM advantageQSFP-DD cages with the power budget for 400G ZR/ZR+ coherent. Metro DCI without a transponder shelf.
02
Inside the Silicon
DC leaf-class merchant silicon

Trident 4 — purpose-built for the DC leaf role.

The BCM56780 Trident 4 is Broadcom's 12.8 Tbps DC-leaf merchant ASIC — half the capacity of Tomahawk 4 at substantially lower per-port cost. Native radix is 32 × 400G (or 64 × 200G, 128 × 100G via breakout). Built on TSMC 7 nm with 50G PAM4 SerDes — 256 lanes, 8 lanes per QSFP-DD cage.

What makes TD4 a leaf-specific chip rather than a smaller TH-series: tuned for east-west forwarding rather than spine aggregation. Smaller buffer pool (matches leaf workload patterns), tighter table sizing for VXLAN/EVPN VTEP role, lower power envelope per port. The trade-off is conscious — TD4 is not the right spine for a 16k-GPU cluster, but it's the right leaf for one.

Cross-checked against Broadcom's BCM56780 product page.

ProcessTSMC N7 SeriesStrataXGS RoleDC Leaf SerDes50G PAM4 · 256 lanes OpticsiPo-DWDM ready

· What 32 × 400G looks like

BCM56780 die12.8 Tbps
256 lanes × 50G PAM4 = 12.8 Tbps. Eight lanes per cage → 400G. 1RU box · ~47 W/cage budget supports 400G ZR coherent.
Four design choices that matter

Why TD4 is the right shape for the modern DC leaf.

Different from TH-series in deliberate ways — each choice optimised for the leaf workload rather than spine capacity.

PRINCIPLE 01

Right-sized for east-west.

12.8 Tbps in 1RU is the natural shape of a DC leaf — handles 32 × 400G uplinks to spine plus 64 × 100G downlinks to servers (via breakout) without overprovisioning silicon for capacity that won't be used.

12.8 Tbps · 1RU
PRINCIPLE 02

iPo-DWDM cage budget.

QSFP-DD cages on AS9726-32DB and S9300-32D are sized for ~47 W/port — enough for 400G ZR and OpenZR+ pluggable coherent optics. Plug a coherent module direct into the leaf for transponder-free metro DCI.

~47 W/cage · 400G ZR ready
PRINCIPLE 03

EVPN-VXLAN at line rate.

Hardware-accelerated VXLAN encap/decap with proper VTEP scaling. ESI-LAG multi-homing on the leaf, symmetric/asymmetric IRB, and full BGP EVPN control plane on OcNOS-DC.

VXLAN VTEP · ESI-LAG
PRINCIPLE 04

Same NOS as the spine.

The same OcNOS-DC image that runs on TH4 and TH5 spines runs on TD4 leaves. One configuration model, one automation surface, one telemetry pipeline across the whole fabric. No leaf-specific OS to maintain.

OcNOS-DC · unified image
03
Generation Jump
Trident 3 → Trident 4

Capacity quadrupled. Port speed quadrupled. Same DC leaf job.

TD3-X7 (3.2 Tbps · 32×100G · 16 nm · 25G NRZ) was the workhorse leaf of the 2018–2022 era. TD4 quadrupled the spec sheet at the same 1RU footprint. The role didn't change — the modern DC leaf is just bigger.

Switching capacity
3.2 Tbps → 12.8 Tbps

4× capacity at the same 1RU. Same rack space, four times the throughput.

Native port speed
100G QSFP28 → 400G QSFP-DD

4× per-port speed. Same 32-port radix — but each port carries four times more.

Process node
16 nm → 7 nm

Two-step shrink. Power per Gbps drops dramatically — what 400G ZR coherent needs.

Coherent optics
SR/LR pluggables → 400G ZR/ZR+

QSFP-DD cage budget hosts coherent. iPo-DWDM was a TD4-era arrival.

Continuity: the same OcNOS-DC image runs on TD3 and TD4. Brownfield refresh keeps EVPN configs, BGP peerings, gNMI subscriptions, and Ansible playbooks intact — capacity quadruples, operational model stays. Trident 3 page →
04
What OcNOS-DC Ships
OcNOS-DC on this silicon

Carrier-grade leaf. Coherent optics. Lossless RoCEv2.

The TD4 leaf gets the same OcNOS-DC feature surface as the spine — plus iPo-DWDM machinery for transponder-free DCI when the leaf doubles as a metro extension point.

EVPN-VXLAN Leaf

BGP EVPN with symmetric/asymmetric IRB.

Full RFC 7432 EVPN control plane on the leaf. ESI-LAG multi-homing for active/active server attachment, mass-withdraw convergence, route-target auto-derivation. The TH spine and the TD leaf share the same EVPN image — they peer directly.

iPo-DWDM

400G ZR / ZR+ direct in the cage.

Pluggable coherent optics with full DWDM tuning, FEC tuning, and OIF/CMIS management — all driven through OcNOS gNMI. No transponder shelf required for metro DCI.

Lossless RoCEv2

PFC + ECN + DCQCN.

Full RoCEv2 toolkit on the leaf — same NCCL-tuned defaults as the TH5 spine.

Streaming Telemetry

gNMI / OpenConfig.

Per-port counters, optical-layer state (BER, dispersion, OSNR for ZR), PFC pause counts. Plug into Prometheus/Grafana.

Real Network

BGP · OSPF · IS-IS · SR-MPLS.

Full routing stack on the leaf. Treat it as a real router — not a flat L2 switch.

Validated feature surface

Same OcNOS-DC image as the rest of the fabric.

Layer 3 routing · L1/L2 · AI/ML fabric primitives · Multicast · QoS · Security · Hardware · Management. Per-platform validation visible on the public OcNOS Feature Matrix.

EVPN-VXLAN ESI-LAG RoCEv2 / PFC DCQCN 400G ZR / ZR+ BGP / OSPF / IS-IS SR-MPLS gNMI / NETCONF ZTP
Day-0 to Day-2

ZTP. gNMI on-change. NETCONF + YANG. DCBX.

Bring up a TD4 leaf in the rack with zero-touch provisioning. Stream every counter — including coherent optics layer state — to your observability stack. No glue scripts.

ZTP IPv4/IPv6 gNMI NETCONF OpenConfig YANG CMIS optics Ansible Terraform provider
Who builds this stack

Three operator profiles. One leaf-class silicon.

Same TD4 silicon, three different DC roles — each leveraging different sides of the same chip.

DC Operator · 400G Leaf

The 400G leaf upgrade from a 100G fabric.

"Our DC leaf is 100G QSFP28 today. Rack densities are climbing. We need 400G to the leaf — but we're not ready to redesign the spine."

TD4 leaves at 32×400G with 4× breakout to 100G servers. Same EVPN-VXLAN config language as the TD3 fabric they replace. Same OcNOS-DC image. The spine doesn't change.

DC · Leaf Refresh
Metro DCI · iPo-DWDM

Transponder-free metro extension.

"We have two DCs 80 km apart. Optical group wants to retire the transponder shelf. Network group wants 400G between them. Procurement wants one box, not two layers."

TD4 leaf with 400G ZR pluggables direct in QSFP-DD cages. EVPN inter-DC stretches the L2/L3 fabric. The optical layer collapses into the IP layer. One box, both layers.

DCI · Metro
AI Cluster · Small / Medium

256–512 GPU cluster on a single-tier fabric.

"Our cluster is 32 GPU servers at 100G NICs. We don't need a multi-tier Clos. But we want lossless RoCEv2 and the option to grow."

A pair of TD4 switches form a single-tier fabric for 256 GPUs at 100G NICs (4× breakout). RoCEv2 lossless from server to switch, NCCL-tuned DCQCN, ESI-LAG for multi-homed compute. Drop in a TH4 or TH5 spine to scale beyond 512.

DC · Small AI Fabric
Full Feature Matrix AI Fabric Solution Coherent DCI Deep-Dive Hardware Compatibility List
Frequently Asked

The questions architects actually ask.

Two open-hardware 1RU 32×400G platforms: Edgecore AS9726-32DB and UfiSpace S9300-32D. Same architectural class (32×QSFP-DD on Broadcom BCM56780), different ODMs. Both ship ONIE pre-loaded and run the same OcNOS-DC image as the TH5 spines and TH4 deep-buffer aggregation switches.
TD4 (BCM56780) is 12.8 Tbps in 1RU with 32×400G — half the capacity of TH4 (BCM56996) which is 25.6 Tbps in 2RU with 64×400G. TD4 is the DC-leaf-class chip — smaller box, lower power, lower cost per port. TH4 is the spine/aggregation-class chip with optional HBM deep buffer. In a leaf-spine fabric: TD4 in the leaf, TH4 or TH5 in the spine. The same OcNOS-DC image runs on both.
Yes, when the cluster is small enough. A 12.8 Tbps spine supports a 32-leaf single-tier fabric with 32×400G uplinks — sized for clusters in the 256–512 GPU envelope at 100G NICs, or up to ~128 GPUs at 400G NICs. Above that, the spine wants TH4 (25.6 Tbps) or TH5 (51.2 Tbps) capacity for proper Clos scaling. OcNOS-DC handles all three identically.
IP-over-DWDM. Both AS9726-32DB and S9300-32D have QSFP-DD cages with the power budget for 400G ZR and OpenZR+ pluggable coherent optics. Plug a coherent module directly into the leaf — no separate transponder shelf, no muxponder. For metro DCI between two leaf switches, the optical layer collapses into the IP layer. Saves CapEx, OpEx, and rack U.
Yes — TD4 has the same Broadcom shared-buffer architecture and PFC + ECN primitives as TH-series. OcNOS-DC ships PFC, ETS, Dynamic ECN, DCQCN, and PFC Deadlock Detection & Recovery on TD4 platforms. Adaptive routing (DLB) is ASIC-supported and configurable. The 12.8 Tbps capacity makes TD4 a good fit for the leaf in a small-to-mid AI fabric — RoCEv2 lossless from server to leaf, then lossless across the spine on TH4 or TH5.
For 800G ports today (use TH5). For pure 100G/25G DC leaf where the cluster is below ~64 servers (TD3-X7 is much cheaper). For SP edge or carrier core (use Qumran or Jericho — different feature set). For DCI roles where the box must absorb deep bursts (use TH4 with HBM). TD4's sweet spot is "modern 400G DC leaf with iPo-DWDM headroom."
A data entry note. Broadcom's public part number for Trident 4 is BCM56780; BCM56990 is Tomahawk 4. The HCL admin record may use a non-standard label — but the silicon shipping in AS9726-32DB and S9300-32D is the BCM56780 Trident 4 family. Cross-check with the linked Edgecore and UfiSpace datasheets if exact part numbers matter for your procurement.

Designing a 400G DC leaf with iPo-DWDM headroom?

30-minute architecture session with an OcNOS network architect. Bring your DC layout, server count, and DCI requirements — leave with a sized BoM around AS9726-32DB / S9300-32D and a placement plan vs the TH-class spine.

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