Segment Routing MPLS

Source-initiated traffic engineering on an MPLS data plane. No RSVP-TE state, no per-LSP signaling overhead — just a label stack computed at the head-end from a distributed topology database.

SR-MPLS Underlay with TI-LFA

Four routers in a ring. The primary path between R1 and R3 takes the upper hop; if R2 fails, TI-LFA pre-programs a repair label stack via R4 in under 50 ms.

SR-MPLS four-router ring with TI-LFA repair path Four-router SR-MPLS ring (R1, R2, R3, R4). The primary path goes R1 to R3 via R2 using a Prefix-SID label stack. The TI-LFA repair list reroutes through R4 to R3 if the R1-R2 link fails, providing sub-50 ms protection. primary · {16002, 16003} TI-LFA backup · repair list R1 · head-end SID 16001 R2 · transit SID 16002 R3 · tail-end SID 16003 R4 · PLR SID 16004 IS-IS FLEX-ALGO · TI-LFA <50MS · LABEL-STACK FORWARDING

What SR-MPLS Is

Segment Routing (SR), defined in RFC 8402, distributes a set of topological instructions — segments — through standard IGP extensions (IS-IS: RFC 8667, OSPF: RFC 8665). Each segment is represented as an MPLS label. The head-end router imposes a label stack that encodes the complete explicit path; no per-LSP signaling state is maintained at midpoints.

The result is a simplified data plane: transit nodes perform standard MPLS forwarding with no RSVP adjacency databases, no LDP FECs per prefix, and no optical-style path setup latency. All traffic engineering intelligence moves to the source, enabling policies per flow class, per VPN, or per application without control-plane churn.

SR-MPLS coexists with and progressively replaces LDP in brownfield cores. RFC 8661 defines LDP–SR interworking so operators can migrate incrementally: SR-capable nodes advertise both SR SIDs and LDP labels, enabling end-to-end LSPs across mixed networks without a flag-day cutover.

Fast Reroute: TI-LFA

Topology-Independent Loop-Free Alternate (TI-LFA, RFC 9350) computes pre-programmed backup paths that are loop-free by construction, without the coverage gaps of classic LFA. Recovery is sub-50 ms on hardware that supports it. TI-LFA protects node, link, and SRLG failures — the backup path is encoded as a repair segment list pushed at the PLR before the primary path is removed from the forwarding table.

OcNOS-SP Implementation

OcNOS-SP implements SR-MPLS on Broadcom Qumran MX, Qumran AX, and Jericho2 ASICs. The implementation covers the full SP edge and core feature set:

Control Plane — IS-IS SR

IS-IS with SR extensions (RFC 8667). Node SID, Adjacency SID, Anycast SID. Prefix-SID advertisement with N and P flags. Flexible Algorithms (RFC 9350) for topology-aware SID assignment.

Traffic Engineering — SR-TE

SR-TE policies with explicit segment lists. Head-end steering by color + endpoint. PCE-delegated path computation via PCEP (RFC 8231). ODN (On-Demand Next-hop) for automatic SLA-aware path selection.

Fast Reroute — TI-LFA

TI-LFA enabled per interface. Protects node and link failures. Backup path pre-installed in hardware forwarding table. Recovery below 50 ms on Qumran-class ASICs.

ECMP & Load Balancing

SR ECMP over multiple next-hops with 5-tuple flow hashing. Equal-cost paths resolved per SID via MPLS forwarding table. Per-flow entropy label support for load-balance visibility.

LDP Interworking

RFC 8661 LDP–SR interworking for brownfield migration. Mapping server for prefix SID to LDP label binding. SR-LDP border node functionality — no flag-day core migration required.

BFD for SR

BFD for MPLS LSP (RFC 5884) with SR-TE policy binding. Sub-second fault detection feeding into TI-LFA switchover. Discriminator allocation per SR policy.

Telemetry

OpenConfig SR YANG models. gNMI streaming of SID utilization, ECMP distribution, and TE policy state. Prometheus-compatible via gRPC collector.

SRv6 Co-existence

SR-MPLS and SRv6 can be deployed on the same OcNOS-SP node. Per-VPN steering between MPLS and IPv6 data planes. Interworking function for cross-domain SRv6–SR-MPLS stitching.

OcNOS-Validated Hardware

For reference only. The platforms below are a representative subset of SR-MPLS-validated hardware. The complete, current list of qualified platforms — with ASIC, port density, and version coverage — is maintained in the OcNOS Hardware Compatibility List.

UfiSpace S9600-32X
Qumran MX · 32×100G
UfiSpace S9600-64X
Qumran MX · 64×100G
UfiSpace S9610-36D
Qumran AX · 36×400G
UfiSpace S9610-46DX
Qumran AX · 36×400G + 10×100G
Celestica E1031
Qumran MX · 32×100G
UfiSpace S9321-64E
Jericho2 · 64×400G
UfiSpace S9510-28DC
Qumran AX · IPoDWDM
Edgecore AS9726-32DB
Jericho2C+ · 32×400G

Compare SR-MPLS support across all OcNOS-validated platforms

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