BCM88483 · Deep buffer · IEEE 1588v2 Class C/D · 400G ZR ready

Broadcom Qumran 2A Qumran 2A Routers Deep-buffer SP edge with timing. 25/100/400G in 1RU.

Two open-hardware short-depth 1RU routers validated on OcNOS-SP: Edgecore AS7535-28XB and UfiSpace S9510-28DC. SP metro edge silicon with deep buffers, hardware PTP/SyncE timing, TSN forwarding, and the QSFP-DD power budget for 400G ZR coherent direct in the cage.

01The Routers 02Inside the Silicon 03Q-Family Map 04OcNOS-SP
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800Gbps
Switch Capacity
2×400G
QSFP-DD ZR Ready
±30ns
PTP Class D Phase
2SKUs
OcNOS-SP Validated
1RU
Short-depth 300mm
01
The Routers
Open hardware running Qumran 2A

Two short-depth 1RU sibling routers. One OcNOS-SP image.

Same architectural class — 24×25G + 2×100G + 2×400G on Broadcom BCM88483 — different ODMs. Both ship ONIE pre-loaded and run the same OcNOS-SP carrier-grade NOS. The differences are procurement framing and which vendor relationship suits your access network. Each card links to the full vendor datasheet (PDF, hosted locally).

Edgecore· AS series
SP edge · deep-buffer aggregation

AS7535-28XB

Validated on OcNOS-SP · ONIE pre-loaded
Ports
24 × 25G SFP28 + 2 × 100G QSFP28 + 2 × 400G QSFP-DDBreakout: 400G ports break out to 4×100G or 2×200G
Form
1RU · short-depth 300 mm
Power
~180 W typical · AC/DC redundantTiming: Class C/D PTP · SyncE G.8262
CPU
Intel · 2 GB RAM
▌ Pick this when

Tier-2/3 SP metro edge with IEEE 1588v2 timing requirements (5G fronthaul, mobile backhaul, FTTH aggregation). Deep buffer + 400G ZR coherent on the QSFP-DD makes it dual-purpose as the iPo-DWDM metro DCI box.

Edgecore AS7535-28XB datasheet PDF
UfiSpace· S9510 series
SP edge · deep-buffer aggregation

S9510-28DC

Validated on OcNOS-SP · ONIE pre-loaded
Ports
24 × 25G SFP28 + 2 × 100G QSFP28 + 2 × 400G QSFP-DDBreakout: 400G ports break out to 4×100G or 2×200G
Form
1RU · short-depth 302 mm
Power
~180 W typical · AC/DC redundantTiming: Class C/D PTP · SyncE G.8262 · TSN
CPU
Intel · 2 GB RAM
▌ Pick this when

Architecturally identical to AS7535-28XB — same Q2A silicon, same port mix, same timing capability. Pick by ODM relationship, RMA logistics, or where UfiSpace platforms already dominate the access network.

UfiSpace S9510-28DC datasheet PDF

· How Qumran 2A fits in the Q-family

Q2U vs Q2AQ2U (BCM88280) is the smaller compact CSR — fewer ports, no 400G, lower power. Q2A is the deeper-buffer aggregation/edge step up.
Q2A vs Q2CQ2C (BCM88480) has more 100G/400G ports for larger metro hubs. Q2A is sized for short-depth edge cabinets where 24×25G + 2×100G + 2×400G is the right port mix.
Q2A vs J2C+J2C+ (BCM88850) is the carrier-core class — 7.2 Tbps with full Internet-scale FIB. Use Q2A in front of it as the edge.
Timing-first deploymentsBoth Q2A platforms have hardware PTP Class C/D and SyncE — sufficient for 5G fronthaul/midhaul timing budgets per ITU-T G.8275.1.
02
Inside the Silicon
SP edge silicon with timing

Qumran 2A — deep-buffer access aggregation at 800 Gbps.

The BCM88483 Qumran 2A is Broadcom's deep-buffer SP edge ASIC — 800 Gbps switching capacity tuned for the access aggregation role rather than DC east-west traffic. The port mix on the validated platforms — 24 × 25G + 2 × 100G + 2 × 400G — reflects that role: many access-side downlinks, a handful of high-capacity uplinks. The 400G ports are full QSFP-DD with the power budget for ZR coherent.

Three things distinguish Q2A from a DC switch chip. Hardware-assisted PTP at Class C/D accuracy for mobile fronthaul timing. Deep buffer architecture sized for asymmetric N:1 fan-in from the access side. TSN / IEEE 802.1Q time-sensitive forwarding for industrial and utility-grade SLAs. None of these are options on a Tomahawk or Trident.

Cross-checked against Broadcom's BCM88483 product page and the linked vendor datasheets.

SeriesStrataDNX BufferDeep · on-chip Timing1588v2 Class C/D · SyncE TSNIEEE 802.1Q-2018 Optics400G ZR ready

· Port mix · 800 Gbps shaped for the edge

Access · 25G24 × SFP28
Mid · 100G2 × QSFP28
Uplink · 400G2 × QSFP-DD (ZR)
BCM88483 die800 Gbps
Asymmetric port mix — many access-side downlinks, two coherent-ready uplinks. Hardware PTP on every port.
Four design choices that matter

Why Q2A is the SP edge chip — not a smaller DC switch.

These four architectural choices are what make Q2A purpose-built for SP roles.

PRINCIPLE 01

Deep buffer, asymmetric.

Buffers sized for N:1 fan-in patterns from the access side — long-lived TCP flows, BNG churn, oversubscription bursts. Not the same shape as a DC switch shared-buffer pool. Carrier-grade SLAs hold.

Deep buffer · asymmetric
PRINCIPLE 02

Hardware PTP Class C/D.

IEEE 1588v2 Class C and Class D timestamping in silicon — every port. Sub-30 ns phase accuracy at Class D. Sufficient for ITU-T G.8275.1/G.8275.2 mobile fronthaul/midhaul.

±30 ns · 1588v2
PRINCIPLE 03

SyncE G.8262.

Frequency synchronization layer alongside PTP. ESMC SSM messaging, hold-over support, bidirectional QL traceability. The combination — PTP for phase, SyncE for frequency — is what 5G timing budgets actually want.

G.8262 · ESMC
PRINCIPLE 04

QSFP-DD coherent-ready.

The two 400G ports have ~25 W cage budget — enough for OIF/CMIS-compliant 400G ZR and OpenZR+ pluggable coherent. Same box does access aggregation and metro DCI uplink.

400G ZR · OIF/CMIS
03
The Q-Family Map
Where Q2A sits in Broadcom's Qumran/Jericho line

Four chips, four roles. Pick by the edge or the core you build.

Broadcom's StrataDNX (Qumran/Jericho) family covers SP roles from compact CSR to carrier core. Q2A is the deep-buffer edge with timing — sized for metro and tier-2 aggregation.

QUMRAN 2U · BCM88280

Compact SP CSR.

Smaller box, ~360 Gbps capacity, fanless options. Cell-site gateway, DSLAM aggregation, Tier-3 SP edge. PTP timing — no 400G. Q2U page →

~360 Gbps · 1RU
QUMRAN 2A · BCM88483

SP edge with deep buffer + 400G ZR.

You are here. 800 Gbps with 400G ZR coherent in QSFP-DD. PTP/SyncE. Sweet spot: metro edge / tier-2 aggregation with timing.

800 Gbps · 400G ZR ready
QUMRAN 2C · BCM88480

Larger metro hub.

Higher 100G/400G port density than Q2A. Same Q-family deep buffer + timing. Use when access-side density is the constraint.

2.0 Tbps · 1RU
JERICHO 2C+ · BCM88850

Carrier-core router.

7.2 Tbps single-chip / 14.4 Tbps dual. Internet-scale FIB. Sit Q2A in front of it as the edge. J2C+ page →

7.2–14.4 Tbps · 2RU
04
What OcNOS-SP Ships
OcNOS-SP on this silicon

Carrier-grade NOS. Timing-first defaults. SR-MPLS native.

OcNOS-SP exposes Q2A's full SP feature surface — Layer 3 routing, MPLS service plane, IEEE 1588v2 timing, MACsec, gNMI/NETCONF automation — through one configuration model. 800+ features in the OcNOS-SP feature matrix.

SR-MPLS · TI-LFA · BGP-LU

Segment Routing-MPLS native, RSVP-TE for legacy.

Full SR-MPLS with TI-LFA fast reroute (sub-50ms convergence), Flex-Algorithm constraint paths, and BGP-LU for inter-AS labelled unicast. RSVP-TE remains available for legacy interop. EVPN-MPLS overlays on top — multi-tenant L2VPN/L3VPN with no proprietary glue.

PTP / SyncE Timing

1588v2 Class C/D + SyncE G.8262.

Full G.8275.1 and G.8275.2 mobile profiles. Boundary clock, transparent clock, and ordinary clock modes. SSM/ESMC, hold-over, hybrid mode. The 5G fronthaul timing budget closes here.

MACsec

IEEE 802.1AE line-rate.

AES-GCM 256, EAPoL-MKA key management, hitless rekey on 100G/400G transport. Mandatory in many SP fabrics.

400G ZR Coherent

iPo-DWDM in the metro.

OIF/CMIS-driven coherent optics direct in QSFP-DD. Full optical-layer telemetry — BER, OSNR, dispersion margin — through gNMI. Saves the transponder shelf.

L3 Routing

BGP · IS-IS · OSPF · L3VPN.

Multi-million-route BGP, BMP telemetry, RPKI ROV, AS-confederation. Full L3VPN service plane with VPNv4/v6.

Validated feature surface

800+ features across the OcNOS-SP matrix.

Every SP feature category — routing, MPLS service plane, EVPN, timing, automation, security. Verifiable per-platform on the public matrix.

SR-MPLS / TI-LFA BGP-LU EVPN-MPLS L3VPN VPNv4/v6 PTP G.8275.1 SyncE G.8262 MACsec 400G ZR / ZR+ gNMI / NETCONF ZTP
Day-0 to Day-2

ZTP. gNMI on-change. NETCONF + YANG. PTP visibility.

Bring up the AS7535-28XB or S9510-28DC in the rack with zero-touch provisioning. Stream every counter — including PTP phase error and SyncE clock-class — to your observability stack. No glue scripts.

ZTP IPv4/IPv6 gNMI NETCONF OpenConfig YANG PTP telemetry Ansible
Who builds this stack

Three SP profiles. One edge silicon for all three.

Q2A's combination of deep buffer, timing, and 400G ZR coherent puts it in three different conversations — mobile aggregation, metro DCI, and carrier broadband edge.

Mobile Aggregation · 5G

Cell-site backhaul into the metro core.

"Our 5G fronthaul timing budget is tight. We need Class C/D PTP, SyncE on every port, and we don't want to deploy a separate timing appliance."

Q2A's hardware PTP gives Class D phase accuracy on every port. SyncE G.8262 alongside. G.8275.1 profile out of the box. Aggregates 24 × 25G cell-site uplinks; 2 × 100G + 2 × 400G to the metro core.

SP · 5G Aggregation
Metro DCI · 400G ZR

Transponder-free metro DCI without a shelf.

"We have two regional aggregation hubs 80 km apart. The optical group wants to retire the transponder shelf. We need 400G between them and IP-layer visibility."

Q2A's 2 × 400G QSFP-DD ports host 400G ZR / OpenZR+ pluggable coherent direct in the cage. EVPN-MPLS inter-DC for tenant extension. Both hubs run the same OcNOS-SP image, both surface optical-layer telemetry through gNMI.

SP · iPo-DWDM
Broadband Aggregation · BNG

FTTH / FTTx edge aggregation.

"Our access network is GPON/XGS-PON to subscribers, aggregated through OLTs. The metro edge router has to absorb burst traffic from N:1 fan-in without dropping, and run BGP-LU into the core."

Deep buffer absorbs the asymmetric N:1 fan-in. Hierarchical QoS shapes per-subscriber traffic. SR-MPLS with BGP-LU into the core, EVPN-MPLS for L2/L3VPN services. Same image on every edge box.

SP · FTTH Edge
Full Feature Matrix SP Networks Solution SR-MPLS Deep-Dive Hardware Compatibility List
Frequently Asked

The questions SP architects actually ask.

Two open-hardware 1RU short-depth platforms: Edgecore AS7535-28XB and UfiSpace S9510-28DC. Both run Broadcom BCM88483 (Qumran 2A), both ship ONIE pre-loaded, both run the same OcNOS-SP image. Sized for SP metro edge / aggregation roles where IEEE 1588v2 timing, deep buffer, and 400G ZR coherent matter together.
SP edge boxes carry mixed traffic — long-lived flows from the access network, bursts during BNG churn, and oversubscription from N:1 fan-in. Without deep buffer, transient congestion drops packets and triggers TCP retransmits. Q2A's on-chip + off-chip buffer architecture (HBM-class on the BCM88483) absorbs the bursts. Combined with hierarchical QoS and ETS scheduling, customer SLAs hold under realistic load.
Hardware-assisted IEEE 1588v2 PTP at Class C and Class D accuracy (sub-100 ns and sub-30 ns phase respectively), full SyncE per ITU-T G.8261/G.8262, boundary clock and transparent clock modes. On AS7535-28XB and S9510-28DC, every port supports PTP — including the 400G ZR ports for cross-DC clock transport. Sufficient for 5G fronthaul/midhaul timing budgets and ITU-T G.8275.1/G.8275.2 mobile profiles.
Yes — both have 2 × 400G QSFP-DD cages with the power budget for OIF/CMIS-compliant 400G ZR and OpenZR+ pluggable coherent optics. Plug a coherent module direct in the spine, no transponder shelf. OcNOS-SP exposes the optical layer (BER, OSNR, dispersion compensation, FEC margin) via gNMI for visibility into both layers from one box.
Q2U (BCM88280) is a smaller compact CSR — fewer ports, no 400G, lower power. Q2C (BCM88480) is the deeper-radix sibling — more 100G/400G ports for larger aggregation. J2C+ (BCM88850) is the carrier-core class — 7.2 Tbps, IP/MPLS core router with full Internet-scale FIB. Q2A sits in the middle: deep-buffer edge with timing, sized for metro and tier-2 aggregation.
A full carrier-grade Layer 3 stack — BGP (with BGP-LU, GR/LLGR, BMP, RPKI), IS-IS, OSPFv2/v3, SR-MPLS with TI-LFA, RSVP-TE for legacy interop, LDP, L2VPN/L3VPN MPLS services, EVPN-MPLS for multi-tenant L2/L3. On the timing side: PTP and SyncE with full G.8275.1/G.8275.2 profiles. On the security side: MACsec line-rate AES-GCM 256. Plus standard automation: gNMI, NETCONF, OpenConfig YANG, ZTP. 800+ features total in the OcNOS-SP feature matrix.
For Tier-1 carrier core (use J2C+ — much higher capacity and table sizes). For pure DC fabric (use Trident or Tomahawk — different feature set, no timing). For sub-100G access aggregation (Q2U is cheaper and a better fit). For 800G uplinks (no Qumran SKU does 800G — that's TH5 territory). Q2A's sweet spot is "SP metro edge with timing and 400G ZR ready."

Designing a deep-buffer SP edge with 400G ZR ready?

30-minute architecture session with an OcNOS network architect. Bring your timing requirements, port-mix expectations, and metro-DCI plans — leave with a sized BoM around AS7535-28XB / S9510-28DC.

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